Integrated circuit devices, for example, integrated circuit devices disposed in memory systems which use power management typically have to deal with a relatively large rate of temperature change (often referred to as “temperature-drift-rate,” in degC/ms) due to self-heating when transitioning from a low-power state to an active state and/or self-cooling when transitioning from an active state to a low-power state. This large temperature-drift-rate can cause a significant timing drift over a short period of time, for example, because of the temperature sensitivity of clock distribution circuits (ps/degC) in a memory device.
Furthermore, in multi-rank memory systems, interfaces of the idle ranks are often shut down to save power. When an idle rank is switched back to an active state from an idle state, various signal timings may have changed because of temperature or other environment-induced timing drift during the idle period.